This invention relates to semiconductor memory devices and more particularly to an MOS ROM which is electrically erasable and electrically programmable.
Semiconductor memory devices which are nonvolatile have great utility in that the information stored is not lost when the power supply is removed. The most common example of a nonvolatile memory is the MOS ROM wherein the stored information is permanently fixed upon manufacture by the gate level mask or moat mask as set forth in U.S. Pat. No. 3,541,543, assigned to Texas Instruments. Most calculators and microprocessor systems employ ROM's of this type to store a program consisting of a large number of instruction words. However, it would be preferable to program the ROM devices after manufacture so all devices are made the same and no unique masks are required. Various electrically programmable ROM devices have been developed such as that shown in U.S. Pat. No. 3,984,822 which employs a floating gate in a double level polysilicon MOS ROM; the floating gate is charged by injection of electrons from the channel, and stays charged for years. Other devices of this type have employed charge storage on a nitride-oxide interface. However, even though the devices are electrically programmable, some are not electrically alterable or deprogrammable. To change the program it was necessary to expose the semiconductor chip to ultraviolet light, for example. This requires the device to be packaged with a quartz window above the chip, and then the package must be housed in an accessible location in the system. Electrically alterable ROM's have been developed as set forth in U.S. Pat. Nos. 3,881,180, issued Apr. 29, 1975, 3,882,469, issued May 6, 1975, and 4,037,242, issued July 19, 1977, all by M. W. Gosney and assigned to Texas Instruments; the Gosney devices are floating gate cells with dual injection (both holes and electrons) so that the gates may be charged or discharged. However, the prior cells have exhibited some undesirable characteristic such as large cell size, process incompatible with standard techniques, high voltages needed for programming, etc.
It is therefore the principal object of the invention to provide an improved electrically programmable semiconductor memory cell, particularly an electrically alterable cell. Another object is to provide an electrically alterable cell which is of small cell size when formed in a semiconductor integrated circuit. A further object is to provide a process for making electrically alterable memory cells compatible with N-channel silicon gate technology.